Computer architecture Archives - IEEE Transactions on Quantum Engineering

Multiplexed Bilayered Realization of Fault-Tolerant Quantum Computation Over Optically Networked Trapped-Ion Modules

January 12, 2026Nitish Kumar Chandra Saikat Guha Kaushik P. SeshadreesanQuantum Computing, UncategorizedComputer architecture, Fault tolerance, Fault tolerant systems, Lattices, Logic gates, Noise, Optical variables measurement, Particle beam optics, Qubit, Trapped ions

Abstract: We study an architecture for fault-tolerant measurement-based quantum computation (FT-MBQC) over optically-networked trapped-ion modules. The architecture is implemented with a finite number of modules and ions per module, and leverages photonic interactions for generating remote entanglement between modules and local Coulomb interactions for intra-modular entangling gates. We focus on generating the topologically protected Raussendorf–Harrington–Goyal […]

Dual-Discriminator Hybrid Quantum Generative Adversarial Networks for Improved GAN Performance

December 9, 2025Purin Pongpanich, Tanasanee PhienthrakulQuantum ComputingComputer architecture, Generative adversarial networks, Generators, Hybrid power systems, Integrated circuit modeling, Logic gates, Neural networks, Quantum circuit, Quantum computing, Training

Abstract: This study presents an investigation of the dual-discriminator hybrid quantum generative adversarial network (DDHQ-GAN), a framework designed to enhance the performance of conventional generative adversarial networks (GANs) through the incorporation of a hybrid quantum discriminator. The proposed DDHQ-GAN architecture comprises three primary components: a generator and two discriminators. The research evaluates the efficacy of […]

Hardware-Aware and Resource-Efficient Circuit Packing and Scheduling on Trapped-Ion Quantum Computers

November 14, 2025Miguel Palma, Shuwen Kan, Wenqi Wei, Juntao Chen, Kaixun Hua, Sara Mouradian, Ying MaoQuantum SoftwareCloud computing, Computer architecture, Computers, Hardware, Logic gates, Processor scheduling, Quantum circuit, Qubit, Resource management, Throughput

Abstract: The rapid expansion of quantum cloud services has led to long job queues due to single-tenant execution models that underutilize hardware resources. Quantum multiprogramming (QMP) mitigates this by executing multiple circuits in parallel on a single device, but existing methods target superconducting systems with limited connectivity, high crosstalk, and lower gate fidelity. Trapped-ion architecture, […]

A Modular Quantum Network Architecture for Integrating Network Scheduling with Local Program Execution

October 23, 2025Thomas R. Beauchamp, Hana Jirovská, Scarlett Gauthier, Stephanie WehnerEarly Access, Open AccessComputer architecture, Hardware, Network architecture, Operating systems, Performance evaluation, Processor scheduling, Quantum entanglement, Quantum networks, Qubit, Schedules

Abstract: We propose an architecture for scheduling network operations enabling the end-to-end generation of entanglement according to user demand. The main challenge solved by this architecture is to allow for the integration of a network schedule with the execution of quantum programs running on processing end nodes in order to realise quantum network applications. A […]

Exploration of Design Alternatives for Reducing Idle Time in Shor’s Algorithm: A Study on Monolithic and Distributed Quantum Systems

September 17, 2025Moritz Schmidt Abhoy Kole Leon Wichette Rolf Drechsler Frank Kirchner Elie MounzerQuantum Computing, UncategorizedArithmetic, Computer architecture, Hardware, Logic gates, Optimization, Quantum circuit, Quantum computing, Qubit, Registers, Standards

Abstract: Shor’s algorithm is one of the most prominent quantum algorithms, yet finding efficient implementations remains an active research challenge. While many approaches focus on low-level modular arithmetic optimizations, a broader perspective can provide additional opportunities for improvement. By adopting a midlevel abstraction, we analyze the algorithm as a sequence of computational tasks, enabling systematic […]

Quantum Circuit Compilation for Trapped-Ion Processors With the Drive-Through Architecture

March 6, 2025Che-Ming Chang, Jie-Hong Roland Jiang, Dah-Wei Chiou, Ting Hsu, Guin-Dar LinQuantum SoftwareComputer architecture, Hardware, Heating systems, Ions, Logic gates, Program processors, Quantum cascade lasers, Quantum circuit, Quantum computing, Qubit

Abstract: Trapped-ion technologies stand out as leading contenders in the pursuit of quantum computing, due to their capacity for highly entangled qubits. Among many proposed trapped-ion architectures, the “drive-through” architecture has drawn increasing attention, notably for its remarkable ability to minimize heat generation, which is crucial for low-temperature operation and thermal noise reduction, thus reliable […]

Entanglement Routing in Quantum Networks: A Comprehensive Survey

February 11, 2025Amar Abane, Michael Cubeddu, Van Sy Mai, Abdella BattouQuantum InternetComputer architecture, Quantum channels, Quantum entanglement, Quantum repeaters, Repeaters, Reviews, Routing, Routing protocols, Surveys, Topology

Entanglement routing in near-term quantum networks consists of choosing the optimal sequence of short-range entanglements to combine through swapping operations to establish end-to-end entanglement between two distant nodes. Similar to traditional routing technologies, a quantum routing protocol uses network information to choose the best paths to satisfy a set of end-to-end entanglement requests. However, in […]

RSFQ All-Digital Programmable Multitone Generator for Quantum Applications

December 20, 2024João Barbosa, Jack C. Brennan, Alessandro Casaburi, M. D. Hutchings, Alex Kirichenko, Oleg Mukhanov, Martin WeidesEnabling TechnologiesComb filters, Computer architecture, Delays, Generators, Photon detectors, Quantum circuit, Qubit, Scalability, Shift registers, Standards

One of the most important and topical challenges of quantum circuits is their scalability. Rapid single flux quantum (RSFQ) technology is at the forefront of replacing current standard CMOS-based control architectures for a number of applications, including quantum computing and quantum sensor arrays. By condensing the control and readout to single-flux-quantum-based on-chip devices that are […]

BeSnake: A Routing Algorithm for Scalable Spin-Qubit Architectures

July 17, 2024Nikiforos Paraskevopoulos, Carmen G. Almudever, Sebastian FeldQuantum ComputingComputer architecture, Logic gates, Quantum circuit, Qubit, Routing, Task analysis, Topology

As quantum computing devices increase in size with respect to the number of qubits, two-qubit interactions become more challenging, necessitating innovative and scalable qubit routing solutions. In this work, we introduce beSnake, a novel algorithm specifically designed to address the intricate qubit routing challenges in scalable spin-qubit architectures. Unlike traditional methods in superconducting architectures that […]

FASQuiC: Flexible Architecture for Scalable Spin Qubit Control

June 5, 2024Mathieu Toubeix, Eric Guthmuller, Adrian Evans, Antoine Faurie, Tristan Meunier,Enabling TechnologiesCalibration, Computer architecture, Field programmable gate arrays, Frequency control, Generators, Hardware, Logic gates

As scaling becomes a key issue for large-scale quantum computing, hardware control systems will become increasingly costly in resources. This article presents a compact direct digital synthesis architecture for signal generation adapted for spin qubits that is scalable in terms of waveform accuracy and the number of synchronized channels. The architecture can produce programmable combinations […]