Logic gates Archives - IEEE Transactions on Quantum Engineering

Benchmarking Quantum Circuit Transformation With QKNOB Circuits

January 8, 2025Sanjiang Li, Xiangzhen Zhou, Yuan FengQuantum SoftwareApproximation algorithms, Benchmark testing, Costs, Logic gates, Performance evaluation, Quantum circuit, Quantum mechanics, Qubit, Scalability, Transforms

Current superconducting quantum devices impose strict connectivity constraints on quantum circuit execution, necessitating circuit transformation before executing quantum circuits on physical hardware. Numerous quantum circuit transformation (QCT) algorithms have been proposed. To enable faithful evaluation of state-of-the-art QCT algorithms, this article introduces qubit mapping benchmark with known near-optimality (QKNOB), a novel benchmark construction method for […]

Dissipative Variational Quantum Algorithms for Gibbs State Preparation

December 4, 2024Yigal Ilin, Itai AradQuantum ComputingCost function, Hardware, Logic gates, Noise, Quantum algorithm, Quantum circuit, Quantum computing, Qubit, Resilience, Toy manufacturing industry

In recent years, variational quantum algorithms have gained significant attention due to their adaptability and efficiency on near-term quantum hardware. They have shown potential in a variety of tasks, including linear algebra, search problems, Gibbs, and ground state preparation. Nevertheless, the presence of noise in current day quantum hardware severely limits their performance. In this […]

Grover’s Oracle for the Shortest Vector Problem and Its Application in Hybrid Classical–Quantum Solvers

November 18, 2024Miloš Prokop, Petros Wallden, David JosephQuantum ComputingAlgorithms, Costs, Hardware, Lattices, Logic gates, Quantum algorithm, Quantum annealing, Qubit, Sieving, Vectors

Finding the shortest vector in a lattice is a problem that is believed to be hard both for classical and quantum computers. Many major postquantum secure cryptosystems base their security on the hardness of the shortest vector problem (SVP) (Moody, 2023). Finding the best classical, quantum, or hybrid classical–quantum algorithms for the SVP is necessary […]

Improving Probabilistic Error Cancellation in the Presence of Nonstationary Noise

August 23, 2024Samudra Dasgupta, Travis S. HumbleQuantum ComputingAccuracy, Logic gates, Noise, Noise measurement, Probabilistic logic, Quantum computing, Qubit

In this article, we investigate the stability of probabilistic error cancellation (PEC) outcomes in the presence of nonstationary noise, which is an obstacle to achieving accurate observable estimates. Leveraging Bayesian methods, we design a strategy to enhance PEC stability and accuracy. Our experiments using a five-qubit implementation of the Bernstein–Vazirani algorithm and conducted on the […]

Simulation of Charge Stability Diagrams for Automated Tuning Solutions (SimCATS)

August 20, 2024Fabian Hader, Sarah Fleitmann, Jan Vogelbruch, Lotte Geck, Stefan van WaasenEnabling TechnologiesComputational modeling, Electrons, Logic gates, Quantum computing, Quantum dots, Quantum mechanics, Tuning

Quantum dots (QDs) must be tuned precisely to provide a suitable basis for quantum computation. A scalable platform for quantum computing can only be achieved by fully automating the tuning process. One crucial step is to trap the appropriate number of electrons in the QDs, typically accomplished by analyzing charge stability diagrams (CSDs). Training and […]

Fault-Tolerant One-Way Noiseless Amplification for Microwave Bosonic Quantum Information Processing

August 7, 2024Hany Khalifa, Riku Jäntti, Gheorghe Sorin ParaoanuQuantum InternetComputational modeling, Logic gates, Microwave amplifiers, Photonics, Propagation losses, Quantum entanglement, Qubit

Microwave quantum information networks require reliable transmission of single-photon propagating modes over lossy channels. In this article, we propose a microwave noiseless linear amplifier (NLA) suitable to circumvent the losses incurred by a flying photon undergoing an amplitude damping channel (ADC). The proposed model is constructed by engineering a simple 1-D four-node cluster state. Contrary […]

BeSnake: A Routing Algorithm for Scalable Spin-Qubit Architectures

July 17, 2024Nikiforos Paraskevopoulos, Carmen G. Almudever, Sebastian FeldQuantum ComputingComputer architecture, Logic gates, Quantum circuit, Qubit, Routing, Task analysis, Topology

As quantum computing devices increase in size with respect to the number of qubits, two-qubit interactions become more challenging, necessitating innovative and scalable qubit routing solutions. In this work, we introduce beSnake, a novel algorithm specifically designed to address the intricate qubit routing challenges in scalable spin-qubit architectures. Unlike traditional methods in superconducting architectures that […]

FASQuiC: Flexible Architecture for Scalable Spin Qubit Control

June 5, 2024Mathieu Toubeix, Eric Guthmuller, Adrian Evans, Antoine Faurie, Tristan Meunier,Enabling TechnologiesCalibration, Computer architecture, Field programmable gate arrays, Frequency control, Generators, Hardware, Logic gates

As scaling becomes a key issue for large-scale quantum computing, hardware control systems will become increasingly costly in resources. This article presents a compact direct digital synthesis architecture for signal generation adapted for spin qubits that is scalable in terms of waveform accuracy and the number of synchronized channels. The architecture can produce programmable combinations […]

Advanced Shuttle Strategies for Parallel QCCD Architectures

June 3, 2024Weining Dai, Kevin A. Brown, Thomas G. RobertazziQuantum ComputingComputer architecture, Ions, Junctions, Logic gates, Quantum computing, Qubit, Topology

Trapped ions (TIs) are at the forefront of quantum computing implementation, offering unparalleled coherence, fidelity, and connectivity. However, the scalability of TI systems is hampered by the limited capacity of individual ion traps, necessitating intricate ion shuttling for advanced computational tasks. The quantum charge-coupled device (QCCD) framework has emerged as a promising solution, facilitating ion […]

Scalable Full-Stack Benchmarks for Quantum Computers

May 23, 2024Jordan Hines, Timothy ProctorQuantum ComputingBenchmark testing, Circuits, Computers, Integrated circuit modeling, Logic gates, Program processors, Quantum computing

Quantum processors are now able to run quantum circuits that are infeasible to simulate classically, creating a need for benchmarks that assess a quantum processor’s rate of errors when running these circuits. Here, we introduce a general technique for creating efficient benchmarks from any set of quantum computations, specified by unitary circuits. Our benchmarks assess […]