Circuits Archives - IEEE Transactions on Quantum Engineering

Benchmarking the Ability of a Controller to Execute Quantum Error Corrected Non-Clifford Circuits

September 9, 2025Yaniv Kurman Lior Ella Ramon Szmuk Oded Wertheim Benedikt Dorschner Sam StanwyckEnabling TechnologiesBenchmark testing, Circuits, Codes, Decoding, Fault tolerance, Fault tolerant systems, Logic gates, Measurement uncertainty, Quantum computing, Qubit

Abstract: Reaching fault-tolerant quantum computation relies on the successful implementation of non-Clifford circuits with quantum error correction (QEC). In QEC, quantum gates and measurements encode quantum information into an error-protected Hilbert space, while classical processing decodes the measurements into logical errors. QEC non-Clifford gates pose the greatest computation challenge from the classical controller’s perspective, as […]

Reducing Quantum Error Correction Overhead With Versatile Flag-Sharing Syndrome Extraction Circuits

May 13, 2025Pei-Hao Liou; Ching-Yi LaiQuantum Computing, UncategorizedCircuits, Codes, Decoding, Error correction, Fault tolerance, Fault tolerant systems, Logic gates, Measurement uncertainty, Quantum computing, Qubit

Abstract: Given that quantum error correction processes are unreliable, an efficient error syndrome extraction circuit should use fewer ancillary qubits, quantum gates, and measurements while maintaining low circuit depth, to minimize the circuit area, roughly defined as the product of circuit depth and the number of physical qubits. We propose to design parallel flagged syndrome […]

Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures

December 5, 2024Shivendra Singh Parihar, Girish Pahwa, Baker Mohammad, Yogesh Singh Chauhan, Hussam AmrouchEnabling TechnologiesCircuits, Cryogenics, Electrical resistance measurement, FinFETs, Optimization, Random access memory, Resistance, Transistors, Voltage measurement, Wire

Complementary metal–oxide–semiconductor (CMOS)-based computing promises drastic improvement in performance at extremely low temperatures (e.g., 77 K, 10 K). The field of extremely low temperature CMOS-environment-based computing holds the promise of delivering remarkable enhancements in both performance and power consumption. Static random access memory (SRAM) plays a major role in determining the performance and efficiency of […]

Scalable Full-Stack Benchmarks for Quantum Computers

May 23, 2024Jordan Hines, Timothy ProctorQuantum ComputingBenchmark testing, Circuits, Computers, Integrated circuit modeling, Logic gates, Program processors, Quantum computing

Quantum processors are now able to run quantum circuits that are infeasible to simulate classically, creating a need for benchmarks that assess a quantum processor’s rate of errors when running these circuits. Here, we introduce a general technique for creating efficient benchmarks from any set of quantum computations, specified by unitary circuits. Our benchmarks assess […]