In computing architectures, one important factor is the tradeoff between the need to couple bits of information (quantum or classical) to each other and to an external drive and the need to isolate them well enough in order to protect the information for an extended period of time. In the case of superconducting quantum circuits, one approach is to utilize fixed frequency qubits coupled to coplanar waveguide (CPW) resonators such that the system can be kept in a configuration that is relatively insensitive to noise. Here, we propose a scalable voltage-tunable quantum memory design concept compatible with superconducting qubit platforms. Our design builds on the recent progress in fabrication of Josephson field effect transistors (JJ-FETs) which, use indium arsenide (InAs) quantum wells. The JJ-FET is incorporated into a tunable coupler between a transmission line and a high-quality resonator in order to control the overall inductance of the coupler. A full isolation of the high-quality resonator can be achieved by turning off the JJ-FET. This could allow for long coherence times and protection of the quantum information inside the storage cavity. The proposed design would facilitate the implementation of random access memory for storage of quantum information in between computational gate operations.

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https://ieeexplore.ieee.org/document/9242258