Generating Shuttling Procedures for Constrained Silicon Quantum Dot Array

In silicon quantum computers, a single electron is trapped in a microstructure called a quantum dot, and its spin is used as a qubit. For large-scale integration of qubits, we previously proposed an approach of sharing a control gate in the row or column of a 2-D quantum dot array. In our array, the shuttling […]

Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures

Complementary metal–oxide–semiconductor (CMOS)-based computing promises drastic improvement in performance at extremely low temperatures (e.g., 77 K, 10 K). The field of extremely low temperature CMOS-environment-based computing holds the promise of delivering remarkable enhancements in both performance and power consumption. Static random access memory (SRAM) plays a major role in determining the performance and efficiency of […]