FinFETs Archives - IEEE Transactions on Quantum Engineering

Cryo-CMOS Bias-Voltage Generation and Demultiplexing at mK Temperatures for Large-Scale Arrays of Quantum Devices

June 16, 2025Job van Staveren; Luc Enthoven; Peter Luka Bavdaz; Marcel Meyer; Corentin Déprez; Ville NuutinenQuantum ComputingCryogenics, Demultiplexing, Electrodes, Electromagnetic heating, FinFETs, Logic gates, Program processors, Qubit, Voltage control, Wiring

Abstract: The rapidly growing number of qubits in semiconductor quantum computers requires a scalable control interface, including the efficient generation of dc bias voltages for gate electrodes. To avoid unrealistically complex wiring between any room-temperature electronics and the cryogenic qubits, this article presents an integrated cryogenic solution for the bias-voltage generation and distribution for large-scale […]

Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures

Complementary metal–oxide–semiconductor (CMOS)-based computing promises drastic improvement in performance at extremely low temperatures (e.g., 77 K, 10 K). The field of extremely low temperature CMOS-environment-based computing holds the promise of delivering remarkable enhancements in both performance and power consumption. Static random access memory (SRAM) plays a major role in determining the performance and efficiency of […]